Second place went to Peter Balan from Politehnica University of Bucharest and third place to Andreas Paranici from University of Oradea.
“Radu Voina’s simulation project was perfectly defined for all post layout analyses and his presentation was outstanding and well prepared.” “The TIE+ iniative is an excellent activity and we were proud to support it,” said Matthias Tröscher, business development manager, CST and member of the TIE+ Technical Committee. frequency curves and optimize the number of decoupling capacitors needed to reach the target impedance. With CST PCBS, Voina was able to: analyze Dynamic Voltage (IR) drop to verify compliance with the DC voltage drop target, calculate impedance vs. Radu Voina’s winning entry used CST PCB STUDIO® (CST PCBS) to simulate the power delivery network (PDN) for a GPU processing unit and two 1 Gb DDR3 memory modules. The 2017 TIE+ contest problem required developing a simulation model to improve the signal and power integrity on electronics assemblies. TIE+ expands the PCB design portion of the contest to focus on virtual prototyping disciplines that support high-complexity PCB design. A key goal of the contest is to challenge students with real-life design challenges to further prepare them to meet industry expectations for engineering graduates. As a platinum sponsor of the contest, CST is pleased to provide a free one-year license of CST STUDIO SUITE® to the winner’s institute.Ĭoordinated by “Politehnica” University of Bucharest since 1992, the TIE contest is internationally recognized for promoting student achievements and technological advancements in computer aided design of electronic modules and printed circuit boards (PCB). Please click here to read the full article on Signal Integrity Journal website.Ĭomputer Simulation Technology AG (CST), part of SIMULIA, a Dassault Systèmes brand, congratulates Radu Voina of the Technical University of Cluj-Napoca, the winner of the Interconnection Techniques in Electronics (TIE) contest, held at the “Gheorghe Asachi” Technical University of Iasi, Romania. We are pleased to announce that TIEplus 2017 edition has received international recognition from PCB experts at Signal Integrity Journal in USA. CST Supports the 2017 TIE+ PCB Design Simulation Contest
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